In the field of integrated circuit manufacture, particularly with the continuing trend toward smaller integrated circuit feature sizes, the making of high-reliability conductive electrical contacts between metallization layers and semiconductor elements, particularly contacts between aluminum and diffused junctions into single-crystal silicon, has become more difficult. This increased difficulty is due to the tendency for aluminum and silicon to interdiffuse when in contact with one another, and when subjected to the high temperatures necessary for integrated circuit manufacturing. As is well known in the art, conventional integrated circuit process steps can cause aluminum atoms to diffuse from a metal electrode of pure aluminum into single-crystal silicon to such a depth as to short out a shallow p-n junction in the silicon; this phenomenon is known as junction spiking. The use of silicon-doped aluminum in forming integrated circuit metallization, while preventing junction spiking, is known to introduce the vulnerability of the contact junction to the formation of silicon nodules thereat, such nodules effectively reducing the contact area, and thus significantly reducing the conductivity of the contact.
Accordingly, recent advances in the field of integrated circuit fabrication have been made by the introduction of so-called "barrier" layers at the aluminum-silicon contact. Conventionally, the barrier layer is a refractory metal compound such as titanium-tungsten (TiW), or a refractory metal nitride such as titanium nitride (TiN). The barrier layer is formed at the contact locations so as to be disposed between the silicon and the overlying aluminum layer. In some cases, the barrier layer is formed by deposition of the refractory metal, followed by an anneal which forms both the barrier layer compound and also a metal silicide where the metal is in contact with the silicon; as is known in the art, the metal silicide improves the conductivity of the contact. In any case, the barrier layer inhibits the interdiffusion of aluminum and silicon atoms, thus eliminating the problems of junction spiking and silicon nodule formation noted above.
Other techniques for improving the barrier properties of TiN layers have included the enhancement of the barrier by manipulating and controlling parameters in the deposition of the TiN film. U.S. Pat. No. 4,976,839, issued Dec. 11, 1990 and incorporated hereinto by reference, discloses that the presence of an oxide at grain boundaries within a titanium nitride film improves the ability of the film to prevent the mutual diffusion of silicon and aluminum therethrough. This reference also discloses a method for forming a titanium nitride barrier layer having large grain sizes by increasing the substrate temperature during sputtering, so that the formation of oxides at the grain boundaries may be accomplished with a relatively large amount of oxygen present, but without degradation in the conductivity of the film. Such control of substrate temperature to enhance the TiN barrier is also described in Inoue et al., Proceedings of IEEE VLSI Multilevel Interconnect Conference, (IEEE, 1988) p.205 et seq. TiN deposition parameters other than substrate temperature have also been controlled in efforts to enhance the barrier properties of the film. These parameters include deposition pressure and substrate bias voltage. Each of these prior techniques have been directed to deposit a more densified, or crystallized, TiN film, with the intent that the film has improved barrier properties.
Other known techniques for enhancing TiN barrier properties have included the use of post-deposition treatments of the film by stuffing the TiN film with oxygen. Sinke et al., Appl. Phys. Lett., Vol. 47, No. 5, (1985) p. 471 et seq., describes the use of air exposure as such a treatment. Dixit et al., Appl. Phys. Lett., Vol. 62, No. 4, (1993) p. 357 et seq., describes the use of rapid thermal anneal (RTA) as another post-deposition treatment of TiN film.
It is an object of the present invention to provide a method of forming an integrated circuit in which a barrier layer at contact locations may be formed in such a manner as to provide excellent interdiffusion barrier properties.
It is a further object of the present invention to provide such a method that is useful in extremely small contact openings, including those of below one micron.
It is a further object of the present invention to provide such a method that has a high degree of process robustness.
Other objects and advantages of the present method will be apparent to those of ordinary skill in the art having reference to the following specification together with the drawings.